What’s the Rush?

Thinking

At FPL 2021, my PhD student Jianyi Cheng (jointly supervised by John Wickerson) will present our short paper “Exploiting the Correlation between Dependence Distance and Latency in Loop Pipelining for HLS”. In this post, I explain the simple idea behind this paper and how it can significantly accelerate certain neglected corner cases in high-level synthesis (HLS).

By far the most significant way to extract high performance from a hardware accelerator in high-level synthesis is to use loop pipelining. Loop pipelining is the idea of starting the next iteration of a loop before the previous one finishes, allowing multiple iterations to be executing simultaneously. However, some loop iterations may need a result produced by earlier loop iterations, limiting the extent to which this can be done. HLS tools generally determine a ‘safe’ initiation interval – the number of clock cycles between starting two adjacent loop iterations – and…

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Uncovering multicore interference

Dan's Blog

If I visit an exotic destination, I would surely do some sightseeing. I would cycle to that destination and I would use Google Maps for navigation. At most crossroads, I need to know in which direction I should turn. Other apps running on my phone might delay the indications provided by Google Maps and therefore I can mistakenly make a wrong turn and possibly be eaten by some large animal.

The reason why this is happening is that on all modern multicore processors, applications on different cores of the system are competing for the shared resources. This is not a problem in most applications but it can be in time-sensitive ones. If we design any such time-sensitive programs, we need to know what to expect in terms of interference so that we can accommodate for the delays. The most common approach for evaluating delays in multicore systems is to run…

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A plot twist! Drawing better graphs in PL papers

In this post, I'd like to share some thoughts I've accumulated over the past few years about how to draw better graphs. To get straight to the point, I have two concrete recommendations: normalised data should usually be plotted on a logarithmic scale, andscatter plots can be easier to understand than bar charts. I'll now… Continue reading A plot twist! Drawing better graphs in PL papers

Loop invariants – where should we put them?

Many verification-oriented programming languages have built-in support for attaching loop invariants to loops. A loop invariant is a condition that holds in four different places: immediately before the loop, at the start of each iteration (before evaluating the test condition), at the end of each iteration, and immediately after the loop. Usually, the invariants are… Continue reading Loop invariants – where should we put them?

Greatest hits of PLDI 2018

I had a great time at PLDI 2018 last week. Here is my take on a few of the papers that stood out for me. John Vilk presented a tool called BLeak for finding memory leaks in web browsers. One might think that leak detection is not important in a garbage-collected setting, but Vilk explained… Continue reading Greatest hits of PLDI 2018

What is the difference between latency and throughput?

I've been working in an Electrical and Electronic Engineering department for more than three years now, but I admit that it's only quite recently that I find myself properly understanding the difference between latency and throughput. These are terms that are used all the time when talking about an electronic circuit. The distinction between them… Continue reading What is the difference between latency and throughput?

Aqua Marina – piano sheet music

I transcribed Barry Gray's theme song from Stingray, Aqua Marina, into piano sheet music. There's a vocal part, replete with lyrics, plus a keyboard part comprising a right-hand and chord symbols. It roughly corresponds to what you might find in a musician's "fake book". Available as a pdf file, as an editable Noteworthy Composer file, and an mp3 audio… Continue reading Aqua Marina – piano sheet music